A Novel Economical Design of Multistage Decimators for Low Latency Audio Applications

The oversampling sigma-delta analog-to-digital converter (ADC) is widely used in digital audio systems for its low hardware cost and high precision. The digital filter part of the ADC is the primary source of the silicon and power cost. In this work, we proposed an economical multistage decimation filter architecture to meet the requirements of commercial ADC specifications with a further novel multi-objective optimization strategy. We took group delay and computational cost as objective functions and used annealing algorithm to readjust the stopband attenuation, stopband edge and passband ripple of each filter. Our multistage architecture combines cascaded integrator-comb (CIC) filters, compensating filters and equiripple finite impulse response (FIR) filters at the different stages to balance the overall performance. The experimental results showed that our design approach worked with multi-objective optimization strategy could achieve low group delay with lower cost compared to traditional designs.