Cryogenic Performance for Compute-in-Memory Based Deep Neural Network Accelerator

Compute-in-memory has received a lot of research interests recently to implement the data-intensive computation in deep neural networks. By performing the computing at the storage location, CIM avoids the excessive data transfer thus improving the energy efficiency. SRAM based CIM is one of the promising candidates for its mature technology availability at advanced technology node. To further speed up for CMOS circuits, cryogenic computing which operates at low temperatures has emerged as an attractive solution for high-performance computing at the data center. In this work, we modified NeuroSim, a device-to-system modelling framework with experimentally calibrated 28nm transistor parameters from room temperature to 4K Then we benchmark the performance of SRAM based CIM for ResNet-18 on ImagNet dataset. The energy-delay-product is compared across the temperature, revealing the performance and energy efficiency boost by cryogenic computing. When the cooling infrastructure cost is considered, the overall energy benefits are overshadowed though.