High PSR LDO with Adaptive-EFFRC for Wearable Biomedical Application

An analog capped low-dropout regulator (LDO) with a high-power supply rejection (PSR) and low quiescent current consumption (Iq) is presented and designed in TSMC's 180 nm technology. The LDO is intended for wearable biomedical applications due to its low power consumption and simple topology. The high PSR performance in the DC to medium frequency range is achieved by adapting the embedded feedforward ripple cancellation (EFFRC) technique. Additionally, the PSR enhancement of 30 to 50 dB is maintained across different loading conditions and input voltages by utilizing the proposed adaptive feed-forward gain solution. The best simulated PSR from DC to 250 Hz is no less than -90 dB at a load current (I
_load
) of 200 mA and 100 mA, -78.7 dB at 500 μA, and -75.2 dB at no-load. The LDO has an external load capacitor of 4.7 μF and a minimum I
_q
of 6.5 μA It achieved a line regulation and load regulation of 8.27 mV/V @ 200 mA-lLOAD and 30 mV/mA @ 2.7-V
_in
, respectively.