An Efficient Approach to Design of EEG Preamplifier using Conventional Transconductance Amplifiers

This paper presents the design and optimization of conventional Operational Transconductance Amplifier (OTA) topologies, which can be used in implementation of Electroencephalogram (EEG) pre-amplifier. Gm/ID based systematic approach was used to enhance the performance of Current-Mirror, Telescopic, Folded cascode and Recycled Folded cascode OTA topologies using CMOS transistors working in sub-threshold region. A detailed description of the structure of OTAs, design parameters and trade-offs is presented with a focus to design low-noise and low-power amplifier. The OTAs were designed in a 0.18µm CMOS technology using industry standard Cadence EDA Tool with 1P3M layout. Simulation results show open loop gain of 45.83 dB, 62.63dB, 57.86 dB and 50.13 dB; unity gain bandwidth of 3 kHz, 2 kHz, 3 kHz and 5.5 kHz; NEF of 1.629, 2.7, 0.6 and 7.4 for current-Mirror, telescopic, folded cascode and recycled folded cascode OTAs respectively.