A Novel Implementation of Cascaded T-Type Multilevel Inverter for the Improved Performance with Reduced Switch Count

Multilevel Inverters are widely employed for high power and medium voltage applications like AC drive systems, grid tie integration of renewable energy sources, multiple variable speed motor drives, electric vehicles and high voltage DC and AC transmission systems etc. In this article, an improved hybrid topology called Cascaded T-Type Multi Level Inverter (CT
²
MLI) is proposed upon a Cascaded Diode Clamped Multi Level Inverter (CDCMLI) which has the limitations of efficiency and higher switch count. The proposed topology will ensure the reduced switch count, eliminating the clamping diodes, improving the efficiency, minimum number of gate driver circuits, modularity in structure and reduced THD. The proposed topology is compared extensively with CDCMLI. Hybrid pulse width modulation (PWM) technique is applied to both the topologies. Simulation results have proven that the performance of the proposed topology is superior to CDCMLI. A mathematical modelling is derived for better understanding of this topology to various other applications.