Vertical NV-NEM Switches in CMOS Back-End-of-Line: First Experimental Demonstration and Array Programming Scheme

Metallic interconnect layers in a standard 65 nm CMOS back-end-of-line (BEOL) process are leveraged to form vertically oriented non-volatile (NV) nano-electromechanical (NEM) switches for compact implementation of hybrid CMOS-NEM integrated circuits. A reconfigurable look-up table (LUT) implemented with an array of vertical NV-NEM switches is experimentally demonstrated. A row/column addressing scheme is proposed and demonstrated via simulation for programming an array of NV-NEM switches. Scaled NV-NEM technology is projected to be advantageous for high-speed (sub-10ns), low-power reconfigurable computing applications.