Dual gate synthetic WS2 MOSFETs with 120μS/μm Gm 2.7μF/cm2 capacitance and ambipolar channel

We have engineered dual gate WS2 transistors with scaled top and back gate stacks based on a surface physisorption ALD approach for advanced logic applications. Connected dual gate MOSFET operation with a 2ML WS2 channel reaches 210μA/um drain current and 2.7μF/cm
²
capacitance (>3.4×10
¹³
/cm
²
sheet charge density) at 3V gate bias, with >10
⁸
on-off ratio, 120μS/um max. transconductance and 109mV/dec sub-threshold swing at 100nm Lch. This dual gate design enables us to explore EOT scaling, ambipolar I-V and C-V(capacitance-voltage) response on CVD WS
₂
channel.