Impact of Common Source Inductance on the Gate-Source Voltage Negative Spike of SiC MOSFET in Phase-Leg Configuration

The cross-talk and coupling effect between SiC MOSFETs in the phase-leg configuration limits the further release of SiC MOSFET performance in applications. A significant negative voltage spike on the gate-source voltage of SiC MOSFET will breakdown the device, even deteriorate peculiarities in threshold voltage variation and further impact the lifetime. In consideration of the common source inductance, the negative spike of SiC MOSFETs gate-source voltage still needs mechanism research. This paper reveals the dynamic underdamped mechanism to explain the impact of common source inductance on the gate-source voltage negative spike of SiC MOSFET in phase-leg configuration. Experimental results verify this dynamic underdamped mechanism based on the experimental comparison of 3-pin and 4-pin packaged SiC MOSFETs.