Fault Tolerance Scheme for a DC Solid State Transformer

This paper discusses the fault tolerance scheme of a DC Solid State Transformer (DC-SST) with cascaded conversion cells. Each cell is composed of a full bridge DC-DC converter and a series resonant converter. The short circuit faults for the cell are analyzed. The full bridge converter of the cell achieves fault tolerance by changing it into half bridge converter or bypassed. The series resonant converter can be re-configured as half-bridge series resonant converter. The fault tolerance stages are discussed. The fault tolerance schemes are verified by simulation.