Revisited parasitic bipolar effect in FDSOI MOSFETs: mechanism, gain extraction and circuit applications

The parasitic bipolar effect in fully-depleted (FD) silicon-on-insulator (SOI) transistors is revisited including impact ionization and band-to-band tunneling. The current gain β of the parasitic bipolar transistor (PBT) was measured at different temperatures and drain voltages. Back-gate biasing was demonstrated to efficiently suppress the bipolar amplification. TCAD simulations showed that the parasitic bipolar effect enhanced the leakage power in circuits. A strategy to counter its effect is proposed based on the power analysis of 6T SRAM cell with back-gate modulation.