Design of 300 GHz Heterodyne Detector Based on 40nm CMOS

A 300 GHz heterodyne detector based on TSMC 40nm CMOS process is developed for nondestructive detecting applications in this work. The terahertz heterodyne detector, which consists of a voltage controlled oscillator(VCO), a mixer, an IF amplifier and an on-chip patch antenna, exhibits a maximum conversion gain of 11.08 dB, maximum responsivity of 35.75 kV/W and a minimum noise equivalent power (NEP) of 142.04 fW/H
_z
^0.5
when the local oscillator (LO) power is -9 dBm. The output IF frequency bandwidth could reach to 0.1~17 GHz when the conversion gain is greater than 0 dB. The on-chip patch antenna is designed in a ring differential structure at 300 GHz, whose bandwidth and gain are 26 GHz and 4.74 dB, respectively. The proposed terahertz heterodyne detector has been taped out and the chip area is 380μm × 690μm including the on-chip antenna and pads.