Reduction of Commutation Failure Frequency in HVDC Transmission Systems by Means of an Improved Solid-State Fault Current Limiter

In the recent decade, High Voltage Direct Current (HVDC) technology has become the preferred option for bulk power transmission due to its numerous advantages such as lower losses and less space requirements compared to High Voltage Alternating Current (HVAC) transmission. However, in order to accelerate the widespread adoption of HVDC systems, some of their technical challenges such as commutation failure need to be resolved. In this study, a Fully Controllable Solid-State Fault Current Limiter (FCSSFCL) is proposed, which is designed based on both fault severity (fault resistance) and fault initiation time. It inserts an adequate number of resistors in the fault current path so that the commutation failure is prevented. The salient feature of the proposed FCSSFCL is that it is fully controllable, and hence it prevents additional power losses in the inverter AC system. The importance of the proposed FCSSFCL becomes more evident in a power system, wherein the inverter supplies more than one AC system. In such a network, insertion of a large resistance by the FCL during a non-severe fault at one of the inverter AC systems leads to the unnecessary reduction of power flow in other non-faulted AC systems. In order to validate the efficacy of the proposed FCSSFCL, several simulations have been performed under different fault types. The simulation results indicate that the proposed approach can effectively reduce the commutation failure frequency.