Direct Experimental Performance Comparison of Two Microprocessors for the Efficiency Evaluation of Single Event Effects Mitigation Techniques

We present the direct experimental vulnerability comparison of two microprocessor designs with different Single Event Effects (SEE) mitigation techniques at different heavy ion fluxes. The trade-off between the performance, fault-tolerance and power consumption is considered. We introduce the Mean Fluence Between Failures (MFBF) metric for the vulnerability comparison.