Degradation of Sub-Threshold Slope in Ultra-Scaled MOSFETs due to Energy Filtering at Source Contact

We postulate that in ultra-scaled Field Effect Transistors (FET), such as nanowires in sub-7nm technology, the source contact will act as an energy filter and increase the effective temperature of carriers arriving at the channel barrier. This is due to the absence of inelastic scattering in the short source-contact-to-channel region. As a result, the Sub-threshold Slope (SS) will increase substantially. In this paper, we verify this theory through numerical calculations and Technology Computer-Aided-Design (TCAD) simulations calibrated to quantum solvers for electrostatics. It is found that SS degradation increases as the source metal workfunction increases. In the nanowire simulated, SS increases from 94mV/dec to 109mV/dec for gate length, L
_G
, = 10nm and from 72mV/dec to 88mV/dec for L
_G
= 15nm, representing an increase of effective carrier temperature from 300K to more than 340K.