Hierarchical High Sigma Monte Carlo Simulation of SRAM Vmin Shift by Parts for Automotive Grade Fail Rate Projection

We developed an infrastructure to simulate SRAM Vmin shift from time-zero (TO) to end-of-life (EOL) by parts utilizing the Hierarchical Monte Carlo tool under Mentor's Solido Variation Designer environment. This tool applies machine learning (ML) to rapidly verify full-chip memories with perfect SPICE accuracy. This allows us to simulate a large number of SRAM parts and obtain a better description of the statistics. The TO Vmin and Vmin shift distribution, obtained from the simulation, provide a way to project SRAM fail rate up to the stringent requirement of <; 1 defective-parts-per-million (dppm) for automotive-grade applications. Furthermore, we used this tool to assess the improvement in SRAM fail rate utilizing TO screening with negative read assist.