Design and Implementation of LSTM Accelerator Based on FPGA

Long Short-Term Memory (LSTM) shows excellent performance in the fields of speech recognition, sentiment analysis, machine translation, etc. In this paper, we designed and implemented a LSTM accelerator based on FPGA. First, in order to reduce data movement and power consumption, a multi-level storage strategy is proposed. Next, we arrange multiple Processing Engine (PE) to realize the parallel operation of the matrix-vector multiplication module, and use the pipeline structure to improve performance. In the Element-wise module, time-division multiplexing is proposed to reduce hardware consumption. Finally, we use the Internet Movie Data Base (IMDB) dataset to train a small-scale LSTM neural network, and implemented our accelerator on Virtex-7 VC707 FPGA at 200MHz. Compared with existing works, the peak performance of accelerator can reach 10.9 GOP/s, which means our accelerator performance is better than existing work.