Low-Memory Implementation of Authenticated Encryption Algorithm SAEAES on ARM Cortex-M0 Microcontroller

SAEAES is a lightweight authenticated encryption algorithm and is a candidate of the NIST's competition for choosing a new standard. Memory footprint is a key performance metric of lightweight cryptography in software implementation on resource-constrained embedded devices. We present the first low-memory implementation of SAEAES on the ARM Cortex-M microcontroller. Our ROM- and RAM-oriented SAES implementations achieved (ROM: 586, RAM: 129 bytes) and (ROM: 608, RAM: 112 bytes). We compare these performances with the conventional implementations including the one optimized for the RL78 microcontroller.