Circuit Reliability Evaluation of Approximate Computing

With the downscaling of CMOS technology, the reliability issue has become inevitable. Even in fault-tolerant applications, the effects of timing violation caused by the transistor aging are unacceptable. In the past, the traditional method to solve timing violation is to add a wide frequency guardband, which will lead to the decrease of speed. In this paper, the reliability of the approximate computing is evaluated in an image processing applications. And a method to improve circuit reliability is proposed. The results show that this method can turn critical path timing errors, which are difficult to predict and seriously hurt circuit reliability, into deterministic logic simplification errors, and thus the actual function of the circuit is not affected.