Novel Self-timing Speculative Writing for Unreliable STT-MRAM

Considering the insatiable demand for emerging embedded non-volatile memory (NVM), spin-transfer torque magnetic random access memory (STT-MRAM) can be configured with high access speed, readily hybrid integration and guaranteed endurance/retention, which becomes one of the most promising candidates among different types of NVM. However, the major drawback of STT-MRAM is that high switching energy is required, accompanied with unreliable writing operation. In this work, we propose a speculative MRAM writing scheme using self-timing implementation, including speculative/ deterministic write operation and a judgment mechanism. Simulation results show that the speculative scheme can achieve 40% less writing power consumption and 50% less latency during write operation compared to standard writing method. The bit-error rate (BER) is maintained at 10
^-9
without inevitable cost.