Design of Pass Transistor based Phase Frequency Detector for Fast Frequency Acquisition Phase Locked Loop

This paper presents the modified design of the pass transistor-based PFD with improved output characteristics for phase locked loop. The proposed design modifies the reset approach which improves the speed of the PFD to 3.3GHz. Here, the number of transistors has been reduced which adds the advantage of low power consumption. The power consumption achieved as 253.5µw at 3.3GHz reference frequency. The design is based on cadence 0.18 µm CMOS process with the supply voltage of 1.8 V. The design is used for low power and high-speed application.