A Simple Yet Accurate Method for The Unsigned Fixed-Width Multiplier Design

Fixed-width multipliers are widely used in digital signal processing applications. In this paper, we propose a novel unsigned fixed-width multiplier design. The main advantage of the proposed architecture is that it uses a simple yet accurate method for error correction. As a consequence, both low-power and high-accuracy can be achieved at the same time. Compared with an exact (i.e., accurate) multiplier, implementation results show that the proposed approach can save 40.8% circuit area with only 4.6% mean relative error distance.