Small Signal Stability Analysis of Parallel Connected Grid-Tied Inverters with Direct and Self Synchronisation of the Phase Locked Loop

This paper analytically explores the small signal stability of two parallel connected grid-tied inverters, under the alternative strategies of conventional direct measurement synchronisation, where grid side voltages are used as the phase-locked-loop (PLL) input signals, and self-synchronisation, where the resonator outputs from a stationary frame current regulator provide the PLL input signals. The system stability is evaluated by developing a 28
^th
order non-linear state space equation in a rotating frame, which is then linearized around a nominal operating point defined by parameters such as the current reference amplitude, grid frequency, power factor, etc. The analysis shows that parallel inverters are more susceptible to unstable interactions compared to stand-alone inverters, and that the self-synchronising strategy helps ameliorate this adverse dynamic effect. The analysis is supported with detailed simulation and experimental results.