Current-Bunch: A Fast and Accurate Tool to Extract and Optimize Parasitics of Power Packaging

The automatic layout design offers the potential to find out the optimal configuration of power packaging more quickly. However, its development is restrained substantially by the velocity and accuracy of the extraction of the parasitics, which increases the overshooting voltages and switching losses of the power device. In this paper, the "current-bunch" is defined to characterize the transient current distribution in the power packaging. The mathematical models are created to estimate the parasitics with the current-bunch concept. As a result, the parasitics of the power packaging can be extracted quickly and accurately by using the separated current bunches. Besides, the proposed current-bunch enables the optimal layout of power packaging to reduce parasitics. Compared with the traditional finite-element method and boundary element method, comprehensive assessments are presented to confirm the timesaving, efficiency, and accuracy advancements of the proposed current-bunch approach. With the aid of the proposed current-bunch approach, the layout of a multi-chip and multi-terminal power module is optimized, and the parasitics are reduced by 23.4%. The current-bunch is confirmed as an effective tool to boost the automated design of the next-generation power packaging.