A 66.97pJ/bit, 0.0413mm2 Self-Aligned PLL-Calibrated Harmonic-Injection-Locked TX with >62dBc Spur Suppression for IoT Applications

Digital-intensive ultra-low-power (ULP) wireless transmitters (TX) employing harmonic injection locking suffer from large close-in reference spurs that violates the TX spectral mask. This paper presents a self-aligned type-I PLL in conjunction with harmonic injection locking to achieve significantly improved spur performance at ULP for sub-GHz IoT TXs. The on-chip type-I PLL calibrates the phase error in the ring oscillator (RO) in real time and avoid large spurs induced from the frequency deviation in the harmonic injection-locked technique through the proposed twin-T notch filter in the feedback loop. Implemented in 180nm CMOS process, the proposed frequency translating TX occupies an active area of only 0.0413mm
²
with -14dBm output at 915MHz. We report the lowest power consumption with 3X improved energy-efficiency while consistently achieving >62dBc spur suppression. The TX also supports OOK modulation with an average power consumption of 200.9μW only at 3Mb/s data rate achieving 66.97pJ/bit energy efficiency.