A Test Scheme for the Comprehensive Qualification of MMC Submodule Based on 10 kV SiC MOSFETs under High dv/dt

A test scheme is designed to qualify MMC submodules based on 10 kV SiC MOSFETs comprehensively, including thermal design, insulation design, and operation under high dv/dt. In the test scheme, the essential step is the continuous test realized with the proposed ac-dc continuous test circuit with two MMC submodules in series. With the designed modulation scheme, two cascaded submodules are leveraged to generate high dv/dt. The submodule under test has to continuously withstand 2X normal dv/dt of 10 kV SiC MOSFETs, which could occur during the MMC converter operation. Higher dv/dt can also be generated to fully test the submodule. An open loop voltage balancing method is adopted to simplify the continuous test setup. Simulation and experimental results are provided to validate the proposed test scheme.