VLSI Implementation of Image Compression using TSA Optimized Discrete Wavelet Transform Techniques

The Discrete Wavelet transform is one of the best tools for signal and data analysis, It requires efficient hardware implementation in the real-time applications. The submissions established in the field of imaging necessitates compacted architecture. In DWT discrete sampling is accomplished for the wavelets. In this paper, the VLSI implementation of HAAR wavelet-based image compression is proposed and designed. HAAR wavelet transform is one of the easiest methods for image compression because it has coefficients as either 1 or -1. In this work software alone is used for the compression together with optimizing it with a continuous optimization algorithm and provides a hardware-free architecture with low cost. The VHDL work is carried out in Xilinx Platform and provides a truncated power architecture for a concrete application. The same VHDL architecture can also be instigated in FPGA which will harvest hardware effectual compromising outcomes.