Low-Complexity Architecture of Orthogonal Matching Pursuit Based on QR Decomposition

A novel hardware architecture of orthogonal matching pursuit (OMP) is presented here, and the test is implemented on a field-programmable gate array (FPGA). The performance is evaluated by taking RADAR pulses that are compressively sampled synthetically using the random modulation preintegrator (RMPI). Basic test signals such as Gaussian pulse and its variations are taken as input to the RMPI. The output of the OMP algorithm is multiplied by the Gabor time-frequency dictionary to obtain the reconstructed RADAR signal. A novel method to implement the Gabor time-frequency dictionary is also presented. The OMP algorithm generates an estimate of a signal in m (≥ M) iterations for an M-sparse signal. The proposed design is implemented on the Artix7 FPGA device for K = 80, N = 1024, and m = 16, where N is the number of samples and K is the measurement vector length. The design is also implemented for K = 256, N = 1024, and m = 36 using the Virtex6 FPGA device for comparison with other existing designs. The recovery signal-to-noise ratio (RSNR) of 18.336 dB is achieved with this technique. The proposed design utilizes (3m-1) fewer multipliers and consumes 27% less dynamic power compared to previously published FPGA implementation of OMP. The proposed design is hardware efficient even for the higher value of m/K.