The Configurable Hybrid Precoding Processor for Bit-Stream-Based mmWave MIMO Systems

Beamforming technology plays an essential role in the promising millimeter wave (mmWave) massive multiple-input and multiple-output (MIMO) communications for fifth generation (5G) new radio system. Specifically, hybrid analog beamforming and digital precoding scheme can be employed to reduce the excessive radio frequency (RF) chains and data converters in the massive MIMO transceiver while still maintaining optimal spectral efficiency. However, traditional hybrid precoding architecture cannot be configured to support different system specifications, such as the number of bit streams or transmit antennas, leading to the limitation to hardware flexibility and efficiency. This article presents a configurable and low-complexity hybrid precoder based on the parallel data-stream processing in respect of system, algorithm, and architecture. The proposed algorithm was designed to avoid signal dependence between data streams so as to realize configurable precoding architecture. The performance and complexity of the proposed algorithm were also simulated and analyzed in detail in this article. Moreover, the hybrid precoding processor chip was designed and implemented based on the proposed algorithm. A novel data-processing flow was designed in the precoder so as to increase the hardware efficiency and configurability. The designed hybrid precoding chip can be configured to support one to four data streams for 16 × 16 mmWave MIMO systems. The designed precoder was implemented by using TSMC 40-nm CMOS technology. The normalized throughput achieved 11.1 M channel-matrices per second at a maximum clock frequency of 300 MHz. The area complexity is 263.5 kGE, and power consumption is 119.1 mW.