Spin-Transfer-Torque Magnetic-Tunnel-Junction-Based Low-Power Nonvolatile Flip-Flop Designs in the Subthreshold Voltage Region

Most Internet of Things (IoT) devices demand a long battery life for mobility. Between the standby and active modes, the battery lifetime is the most optimal in the standby mode because IoT devices spend most of their lifetime in this mode. The nonvolatile flip-flop (NVFF) permits the total termination of the power supply during the standby mode. Recently, spin-transfer-torque magnetic-tunnel-junction (STT-MTJ)-based NVFF designs have been widely studied for enabling zero standby power consumption. Existing designs of the STT-MTJ-based NVFF have succeeded in achieving a target restore yield of
$4\sigma $
in the upper threshold of the voltage region (e.g., 0.6 V). However, when the supply voltage is lowered further with the intent to reduce the overall power consumption, the restore yield degrades because of increased process variations and offset voltages. This study proposes and analyzes four different STT-MTJ-based NVFF designs capable of operating in the subthreshold voltage region (e.g., 0.4 V). Monte Carlo simulation results based on industry-compatible 28-nm model parameters reveal that pMOS body biasing, one among the four proposed NVFF designs, achieves the target restore yield in the subthreshold voltage region with a reasonable transistor scale-up strategy, whereas the previous designs failed to restore saved data in the MTJ.