The Resistivity Bottleneck: The Search for New Interconnect Metals

The resistivity increase of Cu interconnects with decreasing line width is a major challenge for the continued downscaling of integrated circuits. Various approaches can be employed to mitigate this resistivity bottleneck including (a) facilitating specular interface scattering by using an insulating lattice-matched liner, (b) increasing the grain size or the grain boundary transmission through Fermi surface matching, and (c) choosing a metal with a low product of the bulk resistivity times the bulk electron mean free path. Electron transport measurements on epitaxial metal layers in combination with first-principles simulations are used to quantify the resistivity scaling for a series of metals including Cu, W, Ru, Mo, Co, Rh, and Ir, and to provide insight into the interface structure and chemistry requirements that lead to specular electron scattering and therefore a low resistivity for narrow interconnects.