optimizing READ Variability and Design Guidelines for Ultra-thin (<5nm) Analog Bilayer RRAM

Ultra-thin (<; 5nm) RRAM stacks have been studied for read variability challenges and optimization guidelines for advanced analog RRAM. Systematical AC testing and studies in ultra-thin bilayer RRAM designs lead to important conclusions: (1) The barrier layer is essential to maintain memory window and low read current fluctuation. (2) The switching layer has thickness scaling limitation set by non-switching current and deep trap is not a negligible fluctuation source. (3) The work function selection of electrode metals can influence READ largely: voltage, polarity and read window size.