Nano Ni/Cu-TSVs with an Improved Reliability for 3D-IC Integration Application

Two of the major reliability issues in three-dimensional (3D)-LSIs namely the back-metal contamination (i.e. diffusion of Cu into active Si during the BEOL processes), and the thermo-mechanical stress associated with through-Si-via (TSV) were meticulously studied for Ni/Cu nano-TSVs for their application in 3D-IC integration. A very good barrier ability against Cu-diffusion for Ni seed layer was confirmed from the stable C dd and the absence of metal impurities in the underneath dielectric layer and beyond by respectively the capacitance-voltage analysis and the secondary ion mass spectroscopy, even after annealing at 300 °C. Further, a cluster of 36 Ni/Cu nano-TSVs having the width value of ~500 nm spreading over ~70 μm
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area did not induce any additional thermo-mechanical stress in the vicinal Si after annealing at 300°C, whereas the conventional 5 pm- width Cu-TSVs over a similar area have induced >300 MPa of compressive stress after annealing.