An Inverter-Based True Random Number Generator with 4-bit Von-Neumann Post-Processing Circuit

This paper proposes a small-area low-power inverter-based true random number generator (I-TRNG) which harvests entropy from thermal noise. A single CMOS inverter is used for noise amplification. Clock-feedthrough (CLFT) compensation and body-bias technique provide robustness across a wide range of supply voltage 0.7~1.0 V and temperature -40~100 °C. An on-chip 4-bit Von-Neumann post-processing circuit is implemented for maximum entropy harvesting. I-TRNG is fabricated in 130-nm CMOS technology. It occupies 1495 μm
²
(0.08846 MF
²
) and consumes 0.6585 pJ/bit with a throughput of 0.4456 Mbps (0.1308 Mbits/μW). The random bits generated by I- TRNG pass all FIPS 140-2 and NIST 800-22 tests.