Self-terminated Gate Recessing with a Low Density of Interface States and High Uniformity for Enhancement-mode GaN HEMTs

In this letter, a composite barrier heterostructure containing a “10-nm-thick GaN insertion” was specially designed and produced for normally-off GaN high-electron-mobility transistor. Based on this structure, a novel self-terminated gate recessing technology by thermal decomposition combined with a dry etching has been successfully developed to achieve a low density of interface states and a high uniformity across the wafer. Compared with the conventional dry etching approach, the uniformity of the gate recessing self-terminated at the bottom AlGaN surface was greatly improved with the standard deviation (Std. Dev.) reduced from 1.42 to 0.5 nm. Moreover, this technology almost completely removed the surface damage induced by the dry etching and effectively reduced the surface oxygen contamination. As a result, the frequency-dispersion of C-V characteristics has been significantly suppressed, and the density of interface states was reduced from $\sim 10^{13}$ to $10^{11}\sim 10^{12}\mathrm{e}\mathrm{V}^{-1}\cdot \mathrm{c}\mathrm{m}^{-2}$. This novel technology with a further optimization paves the way for preparing high performance normally-off GaN HEMTs with a gate dielectric or p-GaN gate.