A Segmented Gate Driver for E-mode GaN HEMTs with Simple Driving Strength Pattern Control

Gate overshoot voltage prevention when driving E-mode GaN-based HEMTs is essential for system reliability and EMI suppression. Active gate drivers have been demonstrated to suppress gate voltage overshoot while maintaining fast turn-on. However, they normally require complex driving patterns that are determined using trial and error approaches. In this paper, an active gate driver with an integrated pattern generator is proposed to simplify the control of the dynamic gate driving strength pattern. For best trade-off between overshoot and transition speed, the gate resistance (or gate driving strength) must remain low but with a large resistance switched in briefly during the turn-on transition period. Switch timing of the driving pattern varies with load conditions and the types of transistor. To simplify the programming of the driving pattern, the gate driving strength can be controlled by changing only one external bias resistor in the proposed design. This in turn sets the bias current of a delay chain to adjust the timing of the gate driving strength pattern. The proposed design aims to create a systematic approach to simplify the selection of the gate driving strength pattern.