Investigation of The NBTI and PBTI Effects on Multiplexer Circuit Performances

This paper investigates the effects of Negative Bias Temperature Instability (NBTI) & Positive Bias Temperature Instability (PBTI) on 2-to-1 multiplexer circuit performances. The key objective of this research is to analyse the effects of NBTI and PBTI on the delay and average power of 2-to-1 multiplexer circuit. The study is conducted based on different recovery and stress simulation time condition. The performances are also studied by looking at different defect mechanisms that significantly affect the circuit's performance. The defect mechanisms that are studied in this work consists of interface trap, NIT and combination of interface oxide, NIT and oxide trap, NOT. This work used MOSRA and 32nm High Performance Model (PTM) for the reliability simulation and circuit design using Synopsis HSPICE platform. Based on the result, higher degradation can be observed if the interface trap is accounted as the defect mechanism. Simulation with combination of NBTI and PBTI shows higher degradation as compared to only NBTI or PBTI. This study further proves that NBTI shows more degradation as compared to PBTI. It is important for circuit designer to properly project the lifetime of the circuit by using appropriate defect mechanism model and considering both NBTI and PBTI effects.