A 27-29GHz Integer-N PLL with Quadrature phases for 5G applications

This paper presents a quadrature 27-29GHz mmwave Integer-N phase locked loop (PLL) with an input reference frequency of 25MHz in a bulk CMOS 45nm technology. The PLL utilizes a Cascode Injection based Quadrature Voltage Controlled Oscillator (VCO) with a low phase noise of -87dBc/Hz @1MHz offset, and a 1024-2046 modular divider in step of 2. The PLL achieves a normalized phase noise of -90dBc/Hz at an offset of 1MHz even at a very high divide ratio of 1120 while consuming power of 65mW from a 1.1V power supply in post layout EM simulations. The jitter-power figure of merit (FOM) is -231dBc/Hz which is at par with state of the art PLL designs for 5G applications.