High Bandwidth Low Power 2.5D Interconnect Modeling and Design

The 2.5D interconnect modeling methodologies are investigated in this work. 3D models of silicon interposer with various port settings are discussed and compared with 2D model. With preferred port setting and modeling methodology, the 2D model and 3D model show good correlation in the die to die interconnect model, with less than 5% difference for resistance and capacitance. 3D model gives more realistic inductance which is about 30% to 40% worse than the 2D model. Example designs of 3-layer silicon interposer with different inter layer distance and line configurations (staggered vs. stacked) are presented to show how the geometry variation affects field distribution and crosstalk. The staggered layer to layer line routing and stacked routing configurations show similar resistance, self-inductance, capacitance and aggregated crosstalk results, while the crosstalk distribution is different. 3D modeling of via break out region with non-ideal ground path is also studied here, in order to understand the crosstalk contribution from the line and from the via. The overall modeling and design process described in this paper are aimed to provide a guidance on model and port setting, and to determine physical design trade off for high I/O density 2.5D interconnect design.