Defect Characterization of Spintronic-based Neuromorphic Circuits

Deep neural networks (DNNs) are gaining increasing attention and usage in many fields related to artificial intelligence and cognitive processing. Due to challenges associated with the implementation of DNNs using traditional computing architectures, there is a growing interest for brain-inspired, aka Neuromorphic computing platforms and paradigms for direct and hence more efficient implementation of DNNs. The building blocks and operation mode of circuitry and the architectures for Neuromorphic computing bring new challenges, since the implementation and operation of neural networks is fundamentally different from traditional Boolean logic. From the technology point of view, they are based on emerging non-volatile resistive memories, which have new fabrication processes and steps, and hence subject to new types of defects and failures. This paper addresses technology-specific defect characterization for spintronic-based neuromorphic circuits.