Real-time measurement and control of junction temperature of VDMOS in power cycle test

Power semiconductor devices usually work under high current or high power. When the junction temperature of the device exceeds its allowable range, it will cause thermal damage to the device. The power cycle test is one of the reliability assessment tests. When only the characteristics of PN junction in the off-state of the device are used to measure the junction temperature, the maximum junction temperature of the device in the on-state in actual work cannot be measured in real time. The research in this paper developed a power cycle test equipment for VDMOS by using the corresponding relationship among drain¬source current, drain-source voltage and junction temperature in the on-state, combined with the off-state measurement method. This test equipment is mainly used for VDMOS working under high current, measuring and controlling the junction temperature of the device under test in real time when the device is on or off.