Increasing PE Utilization with a SW/HW Co-Design Technique for Sparse Convolutional Neural Networks

Pruning convolution neural networks (CNN) has proved to be an effective technique to decrease the network size without loss of accuracy. By processing the compressed format of the network, the energy consumption can be considerably reduced. However, the existing SIMD-like sparse CNN accelerator suffers from low processing engine (PE) utilization due to the irregular distribution of effectual pairs. In this paper, we address this issue by proposing a software and hardware codesign technique, including a novel data compression scheme and a dedicated module to handle this compressed format. When compared to a state-of-the-art SIMD-like accelerator, the proposed co-design technique can reduce the computation time of conv3, conv4, conv5 of AlexNet by 15%, 33%, 31%.