Misalignment Analysis and Electrical Performance of High Density 3D-IC interconnects

3D integration is a promising solution to meet the increased need for functionality, density and performance of future integrated circuits. It is an attractive technique to address the requirements of several applications such as smart imagers, high-performance computing and memory-on-logic folding. However, test and characterization of such fine-grained 3D interconnect is still an open issue; Cu-Cu interconnects are prone to many structural defects due to fabrication process, such as misalignment, which needs to be thoroughly tested to ensure the performance of 3D-ICs. In this paper, the causes of local misalignment are well detailed. Then, a simulation using Matlab tool is illustrated and finally the impact of misalignment defect on resistance and capacitance parameters is demonstrated.