Design of High Voltage Output for CMOS Voltage Rectifier for Energy Harvesting Design

This paper presents a modified design of CMOS differential voltage multiplier circuit block for energy harvesting circuit for wireless sensor networks (WSN) application. The design simulation and layout was carried out using 65nm CMOS process. The extraction of high DC voltage from rectifier block is always a severe bottleneck for energy harvesting. In this work, a simple mechanism to eliminate (Vth) of the MOS transistor by adding an auxiliary PMOS transistor is proposed. Also, an additional two capacitor (Cs) is split and connected to the differential output. Moreover, the conventional and modified voltage multiplier was simulated and implemented with three stages with a load capacitance of 100pF. The simulation result shows that the modified voltage multiplier obtain a higher voltage conversion ratio (Gv) of 3.96, while the conventional voltage multiplier only obtained a Gv of 2.96. Accordingly, the proposed modified rectifier circuit achieved a peak efficiency of 22.41 % and can able to operate a device with a power requirement of 1.2V to 1.8V and with a continuous output current of 3mA.