Research on Radar Information Processing System Based on Open Architecture

Aiming at the problems of unconformity, poor versatility and difficult maintenance of existing radar information processing systems, this paper proposes a new scheme for airborne radar information processing system based on open architecture. Supported by OpenVPX bus and SRIO switching technology, the high-speed parallel processing of radar signals is realized by spot digital boards integrated with high-performance DSP and FPGA. The single-channel communication bandwidth reaches 10Gbps, and the communication bandwidth of adjacent modules reaches 80Gbps. The test results show that it only takes 12.8s to complete 16K*16K complex image processing. The spot standard board facilitates function reconstruction and maintenance support, meeting the design requirements.