An Improved Small Signal Equivalent Circuit Modeling Based On 65nm CMOS Technology

In this paper, an improved small-signal equivalent circuit model is proposed. The coupling of multi-finger interconnection line to the ground has been taken into account. An 8 fingers RF MOSFET is fabricated using the 65nm CMOS process to validate the model. The S parameters had been investigated up to 43 GHz. Comparing to the conventional model, the maximum root-mean-square-error (RMSE) of S
₁₁
has reduced from 0.03615 to 0.00577 and the maximum RMSE of S
₂₂
has reduced from 0.07324 to 0.00515. The results show that the model accuracy has been remarkably improved.