An Improved 220-GHz Small-Signal Equivalent Circuit Model Considering Stray Capacitance Effect

This study presents the stray capacitance effect of multi-finger CMOS transistors and an improved model is proposed. A 32-finger MOSFET in 90-nm CMOS process is fabricated and the S parameters are investigated up to 220GHz. The proposed model introduces two RLC networks to characterize the stray capacitance effect and parasitic effect of gate-to-interconnection line and drain-to-interconnection line, respectively. To validate the model, a terahertz MOSFET model is built with the pad coupling effect and interconnect effect, the calculated results and measured data are compared. The comparison shows that the maximum root-mean-square-error (RMSE) of S
₁₁
has reduced from 0.071 to 0.053 and the maximum RMSE of S
₂₁
has reduced from 0.065 to 0.047.