Design and Implementation of a Floating point matrix Inversion Module using Model based Programming

Inverse of a matrix is considered as a computationally expensive matrix operation and design of floating point matrix inversion module for large matrices is still a research topic. In this paper, design and implementation of a floating-point matrix inversion module using model based design and novel architecture for FPGAs is proposed. The proposed module is designed to compute inverse up to a matrix size of 25×25 matrix and details about the scaling of proposed work for larger matrix sizes is also reported in the paper. The performance of proposed matrix inversion module is evaluated by its hardware implementation on a Zynq 7000 FPGA based ZED board and the results are reported.