Design and ASIC Implementation of a Reconfigurable Fault-Tolerant ALU for Space Applications

Electronic devices operating in space suffer from damage due to cosmic rays, hence for such applications, radiation effects are the primary concern. With technology scaling, semiconductor devices are achieving high performance, low power, and less area, but it increases the radiation degradation and makes the integrated circuit vulnerable to error. In this paper, we have discussed the phenomena of Single Event Upset (SEU) and proposed a reconfigurable Arithmetic Logic Unit (ALU) to mitigate the degradation due to SEU. The designed ALU can be configured to either work in 'normal_mode' or 'RadHard_mode' based on a control signal. The design has three identical ALUs; in 'normal_mode' of operation, only one ALU is active, and in 'RadHard_mode' it uses two redundant ALUs to mitigate the effect of SEU. Errors were inserted during the simulation to test the fault tolerance capability of the design. ASIC (Application Specific Integrated Circuit) implementation was done using 180nm CMOS technology; the reported area was 69013μm
²
and power was 4.035mW. This approach may be power efficient compared to the traditional TMR (Triple Modular Redundancy) approach in which all the redundant blocks are always active, independent of operating environment.