Power Grid Strategies for Minimum IR Drop In Multi Power Domain Design

Semiconductor companies are stressing more on the implementation of low power methodology, reduction in die size and low technology process for improvement in overall margins. Power grid delivers the power & voltages required from location of pad to all device components in the design. Hence, designing of power grid should be in such a way, that grid must be able to supply power to all components in IC within the acceptable forte to escape problems like failure of various components, decreasing speed of operation and improve IR drop. Efficient power planning is one of the key concerns of modern SoC designs. In multi voltage designs, providing power to the different power domains is challenging. Every power domain requires independent local power supply and grid structure and some designs may even have a separate power pad. The objective is to analyze various power grid structures for achieving best static and dynamic IR drop using the least routing resources in multi power domain designs.