650 V p-GaN Gate Power HEMTs on 200 mm Engineered Substrates

Engineered substrates with a poly-AlN core, thermally matched to the (Al)GaN buffer, are promising to reconcile the use of high-yield GaN wafers with the use of thick buffers (≥ 650 V) on large scale substrates (≥ 200 mm). We successfully managed to fabricate 650 V p-GaN gate power HEMTs on 200 mm engineered substrates with excellent performance and reliability. The 5.6 μm (AI)GaN epitaxy stack shows low dispersion within ± 10% after a -650 V/10 s back-gating stress. The fabricated power HEMTs with a gate-to-drain distance of 16 μm show a threshold voltage of 3.6 V (at maximum transconductance), a low ON-resistance of 15 n.mm, and a low OFF-state drain leakage below 1 μA/mm up to 650 V at 150 °C. The device reliability was finally validated by high temperature reverse bias (HTRB) and high temperature gate bias (HTGB) stress tests.